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MAX+PLUS之类的组合逻辑电路设计

楼主eincus（美国易美）2003-02-01 03:48:33 在硬件/嵌入开发 / 硬件设计提问

哪位大侠使用过MAX+PLUS之类的组合逻辑电路设计软件，请留言在此，我有问题要请教噢！！
参考这里了解更多资料：
http://www.altera.com/support/software/sof-index.html

Henry
hwang88@hotmail.com 问题点数：0、回复次数：15Top

1 楼CodeSaint（下划线）回复于 2003-02-03 13:40:23 得分 0

有什么问题只管问好了Top

2 楼eincus（美国易美）回复于 2003-02-05 08:17:45 得分 0

全是英文的，没有问题吧？

It is required to design a combinational circuit that takes a binary number input and converts into a Binary Coded Decimal(BCD) number. The BCD number is displayed on the 7-segment LED displays on the UP1 board.

(a) Design a binary to BCD decoder that takes a number represented in binary notation and translates it to the BCD format. For example number 11 (eleven) is represented as 1011 in binary and is represented as 0001 0001 in BCD. So in BCD each of the four bits can only be used to represent digits till 9 while in binary notation these 4 bits can be used to represent digits (in hexadecimal) till 16.

Hint: Consider the number represented in BCD notation as a binary number and see its difference from the actual number it is representing. For example number 11 is represented as 0001 0001 in BCD notation. 0001 0001 in binary corresponds to number 17. The difference between the two is 6.

(b) Enter the design of binary to BCD decoder in MAX PLUS II using the graphic design editor. Use BCD to 7-Segment LED decoders to display the translated number on 7-segment LEDs. For design entry, create a new folder, open graphic editor (.gdf) and save it in the new folder. Set the name of the project to current file. Enter the different components in your design using enter symbol from the Symbol drop down menu and connect them. Look into help for details about these components.

(c) Compile and verify the above design. For compilation open the compiler tool from the Max+plus II menu. From the assign menu select device and set the device to Max7000. From the processing menu set on the Design doctor, Timing SNF extractor and Smart recompile options. Compile the project by pressing the start button.

For Verification, open the simulator tool from the Max+plus II menu. Also prepare a test input file using waveform editor (.scf). Enter all the input and output pins by selecting enter nodes from SNF from Nodes menu. Simulate by pressing the start button in simulator window. Turn in the results of simulation in the waveform format for the input numbers 8, 12 and 15.

(d) Change the pin assignment using the floorplan editor. Recompile and download your design on UP1 board (MAX device). For changing pin assignments, open the FloorPlan editor from the Max+Plus II menu. Select the device view from the Layout menu. Back annotate project from the Assign menu and select the current assignments floorplan from the layout menu. Drag pins to the required positions. Recompile the project exactly as explained the part (c).

For programming of device select the programmer from the Max+plus II menu. Set jumper as shown in the installation manual of Maxplus2 and UP1 board for programming the Max device. Press Program button to program your device. Make required connections using wires on the board and demonstrate the working of your design.Top

3 楼eincus（美国易美）回复于 2003-02-06 08:33:50 得分 0

大过年的, 是不是没人啊？哎。Top

4 楼CodeSaint（下划线）回复于 2003-02-06 13:13:04 得分 0

你的题目是将二进制输入转换成BCD码，然后在有七段数码管输出。
用原理图表示中间器件，然后编译，下载到Max7000芯片上。我得好好想一想。以后在联系。
chen_saint@popmail.comTop

5 楼zxr3085（毛竹）回复于 2003-02-08 01:08:44 得分 0

俺也在学，好象MAXPLUSII编译器对HDL很多功能不支持。Top

6 楼eincus（美国易美）回复于 2003-02-08 02:07:55 得分 0

CodeSaint(我不信邪): 对的，就是这要求！我等你消息，要快哦！先谢谢你了。

zxr3085(毛竹)：真的啊！学多久了？Max Plus II的免费版为Baseline, 不支持HDL. It supports MAX 7000, MAX 3000 and selected ACEX and FLEX devices only. 你可能是MAX+PLUS II BASELINE吧？现在最高版本是10.2。可否交流一下，我的信箱hwang88@hotmail.comTop

7 楼leaflet（我曾经是少先队员）回复于 2003-02-09 17:36:59 得分 0

用什么图形，这种东西用语言是最好的。VHDL或是Verilog，两个进程，每个用一个case语句，基本搞定。然后创建symbol，顶层用图形，^_^。

如果一定要用电路，二进制 to BCD和数码管显示建议参考数字电路书或是数字逻辑，都有。

其实对于数码管译码，是可以用软件来实现的，硬件只做个锁存就可以了。
Top

8 楼eincus（美国易美）回复于 2003-02-10 16:12:50 得分 0

How about this one:

Design of a sequential circuit that takes a 4 bit pattern as an input and counts the number of times this pattern occurs in a fixed sequence of 16 bits. It finally displays this counted number on the 7-segment LED on the UP1 board. You can consider this exercise to be just opposite of the previous one.

(a) Design a Behavioral Description of a state machine that reads a 1 bit input at every clock cycle and records whether the 4 bit pattern has occurred in the stream. Each time the pattern is detected in its input stream, the machine gives out an output 1. Also whenever there is mismatch, it should generate another output. Your machine should recognize overlapped occurrences of pattern.

(b) Design another circuit for deciding to which state the machine should go whenever there is a mismatch. This circuit will take the pattern and the mismatched state as input and give the next state as output.

In part (a) and (b), you have to turn in your design of state machine and other circuits on paper. If you used truth table, Boolean equations or state diagrams then make them the part of your report.

(c) Enter the design of (a), (b) and other necessary circuits in MAX PLUS II using graphic design editor and/or Text design editor (As in the previous lab, Part A will require the use of the text editor) . Use binary to 7-Segment LED decoders to display the output on the 7-segment LED. Use a counter to count the number of occurrences of pattern in the bit stream. The bit stream generator will be provided to you.

For design entry, create a new folder, open graphic editor (.gdf) (or text editor) and save it in the new folder. Set the name of the project to current file. If it is a graphic design file then enter the different components in your design using enter symbol from the Symbol drop down menu and connect them. Look into help for details about these components. For text design file, use VHDL syntax to enter your design.

In part (d) you have to turn in the print of the design file (.gdf and .tdf) as the part of report.

(d) Compile and verify the above design. For compilation open the compiler tool from the Max+plus II menu. From the assign menu select device and set the device to Max7000. From the processing menu set on the Design doctor, Timing SNF extractor and Smart recompile options. Compile the project by pressing the start button.

For Verification, open the simulator tool from the Max+plus II menu. Also prepare a test input file using waveform editor (.scf). Enter all the input and output pins by selecting enter nodes from SNF from Nodes menu. Simulate by pressing the start button in simulator window. Turn in the results of simulation in the waveform format for the patterns (1010, 1011 and 1101) as the part of your report.

(e) Change the pin assignment using floorplan editor. Recompile and download your design on UP1 board (FLEX device). For changing pin assignment open FloorPlan editor from the Max+Plus II menu. Select the device view from the Layout menu. Back annotate project from the Assign menu and select the current assignments floorplan from layout menu. Drag pins to the required positions. Recompile the project exactly as explained the part (e).

For programming of device select programmer from the Max+plus II menu. Set jumper as shown in the installation manual of Maxplus2 and UP1 board for programming the FLEX device. Press Program button to program your device. Make required connections using wires on the board and demonstrate the working of your design.

NOTE: THIS EXERCISE WILL TAKE LONGER TIME, SO START WORKING IN WELL ADVANCE.Top

9 楼eincus（美国易美）回复于 2003-02-12 01:55:24 得分 0

同志们哪！头晕？Top

10 楼eincus（美国易美）回复于 2003-02-13 05:14:00 得分 0

Where are you, expert?Top

11 楼jinkaoyan（jinkaoyan）回复于 2003-02-13 20:04:44 得分 0

这些题哪来的？Top

12 楼eincus（美国易美）回复于 2003-02-14 01:35:53 得分 0

jinkaoyan(jinkaoyan): from an internet, can you please help me?Top

13 楼eincus（美国易美）回复于 2003-02-14 01:36:52 得分 0

Here is my another question:

http://expert.csdn.net/Expert/topic/1414/1414774.xml?temp=.7828028

It looks very hard.Top

14 楼eincus（美国易美）回复于 2003-02-21 05:20:49 得分 0

I have the answer for the first question.

Who can help me to do the second project? I am waiting for you!Top

15 楼tms320dsp（）回复于 2003-02-27 10:05:25 得分 0

用语言吧Top